iNEMI Advanced Packaging Topic Series Webinar

Power delivery requirements for early microprocessors were fairly rudimentary due to relatively low power levels. However, several decades of exponential scaling powered by Moore’s Law has greatly increased power requirements and the complexity of the power delivery scheme.

The steady growth in power levels and the number of power rails in high-performance microprocessors has increased power delivery challenges, and integrated voltage regulators (IVRs) have emerged as a key power delivery technology to address these challenges. There are a number of IVR schemes implemented on-die, ranging from the simple power gate to fully integrated switching regulators. The key performance vectors to judge the quality of the IVR are conversion efficiency, current density, load regulation and configurability.

In this presentation Kaladhar Radhakrishnan, Intel Fellow and a Power Delivery Architect with the Technology Development group at Intel, will review some of the performance targets that these IVRs must meet to keep pace with the expected demand for microprocessor power delivery. He will also talk about the different solution vectors that are being pursued to address these challenges. For additional information.

This webinar is open to iNEMI members and non-members; advance registration is required.

Wednesday, November 24, 2021

8:00-9:00 a.m. EST (Americas)

2:00-3:00 p.m. CET (Europe)

10:00-11:00 p.m. JST (Japan)