ASAP: New NSF center tackling microelectronic chips’ energy efficiency
Microelectronic chips based on semiconductor technology are everywhere—not just in computers and smartphones, but in everything from cars to home appliances. Unfortunately, as they become more and more foundational to modern life, they’re consuming increasing amounts of energy. That’s costly, bad for the environment, and a bottleneck for future innovation.
Now, a new center is being established that will attack microprocessors’ energy efficiency problems head-on, with an ambitious goal of hundredfold reduction in energy consumption.
The Center for Aggressive Scaling by Advanced Processes for Electronics and Photonics (ASAP) is being funded by the National Science Foundation as an Industry-University Cooperative Research Center (IUCRC) housed in the Holonyak Micro & Nanotechnology Lab (HMNTL). Shaloo Rakheja, an assistant professor in Electrical & Computer Engineering (ECE), HMNTL, and the Coordinated Science Lab (CSL), will serve as director.
Rakheja says that the overarching goal of ASAP is “to develop new fundamental technology solutions going all the way from advanced materials, through advanced devices and circuits, to advanced architectures, that are put together holistically to allow us to reduce the energy consumption by a factor of a hundred.”
To cover the full stack, the work will be structured across three themes: materials discovery for electrical and optical interconnects, heterogeneous 3D integration, and highly energy-efficient circuits and architectures.
Rakheja says that ASAP advances should also improve the throughput of processing, meaning that the results will include faster speeds as well as lower energy use. “We want to basically improve on all fronts,” she says.
The biggest energy hog in microprocessors is the transmission of data: a complex fingernail-sized microprocessor might contain dozens of miles of copper interconnects through which data are moved. Typically, 50% to 60% of the energy consumption of microelectronics is due to interconnects, not due to actual computation; the percentage is even higher when data-intensive tasks, like image recognition, are being performed.
As an IUCRC, ASAP will be a membership-based consortium, in which companies and other organizations pay annual dues to belong to the center.
Memberships entitle them to seats on the center’s Industry Advisory Board, giving them a voice in the center’s research directions as well as access to students and intellectual property. They also gain access to faculty from six departments and all three Grainger Engineering interdisciplinary research units, including the Materials Research Lab and Coordinated Science Lab as well as HMNTL. As appropriate, they can leverage UIUC’s infrastructure for basic and applied research, enabling them to perform high-quality synthesis, nanofabrication, high-speed characterization, and multiscale and multi-physics modeling and simulation. Importantly, members will also be able to leverage ASAP as a platform for collaborating with other members from across different sectors of the industry.
ASAP’s starting lineup of members is packed with A-listers, including national and DoD labs, large semiconductor foundries, chip manufacturers, software tool companies, and startups, among others.
Dr. Cliff Hou, Senior Vice President of R&D/Corporate Research at TSMC, said that “TSMC is dedicated to developing the cutting-edge process technology that the world will need in the future, and we are pleased to see that the Center for Aggressive Scaling by Advanced Processes for Electronics and Photonics is addressing research areas and associated concepts with great relevance for the semiconductor industry. We look forward to seeing the outcomes of the Center’s research with high hopes that they will help to propel the industry’s continuous quest for innovative technology scaling and greater power efficiency.”
“As microelectronics have evolved, IBM Research has retained its leadership in creating many of the industry’s newest technologies. Today, these advances are made in collaboration with a diverse ecosystem of public and private sector partners,” said Vijay Narayanan, IBM Fellow and Strategist, Physics of AI at IBM Research. “A full stack approach towards microelectronics research, such as this work with the Center for Aggressive Scaling by Advanced Processes for Electronics and Photonics, is critical to deliver system-level performance while maintaining energy efficiency, and we look forward to engaging closely with researchers in this center.”
ASAP’s cross-disciplinary work will require students to have a broad knowledge base, and there will be a strong focus on educational efforts as well as research.
“For us to understand how we can deliver useful functionality from the final product, it’s very critical to understand different steps of the design phase,” says Rakheja. “It’s very important to communicate. A materials scientist should be able to communicate with a circuit designer. Likewise, a circuit designer should understand, this is the new material that we’re working with.”
On top of typical student development efforts, ASAP will offer a variety of intensive training workshops that help students learn by doing hands-on science, not just watching presentations. The workshops will be developed with the help of industry mentors and senior graduate students, and will be tailored to address knowledge gaps observed in the team.
“Drawing on the expertise of all three of Grainger Engineering’s interdisciplinary research units, ASAP demonstrates the depth and breadth of UIUC’s leadership in developing advanced microelectronics,” said Grainger Engineering Dean Rashid Bashir. “Since John Bardeen’s development of the transistor 75 years ago, Illinois faculty have been pushing scientific boundaries of microelectronics in order to enhance the economic and national security of the United States.”
Qing Cao, an associate professor of Materials Science & Engineering (MatSE), Chemistry, and ECE, will be ASAP’s Associate Director. Naresh Shanbhag, who is the Jack S. Kilby Professor of ECE, and Paul Braun, who is a professor of MatSE and Chemistry, a Grainger Distinguished Chair in Engineering, and the director of the Materials Research Lab, are additional Co-PIs.